1. Field of the Invention
The present invention relates to a voltage-controlled oscillating circuit to be used in a phase locked loop (PLL) circuit, which has played an important role in a high-speed signal processing circuit that requires high-speed, high-precision control of timing signals; and more particularly to a voltage-controlled oscillating circuit wherein a timing signal has a period of one even-numberth of the oscillation period.
2. Description of the Related Art
The art of high-speed, high-precision controlling of timing signals has been one of the most important technologies in various electronics devices. Especially, in high energy physics experiments that require the processing of highly frequent output signals coming out of a detector, it is necessary to control and measure high-speed, high-precision signals in both an accelerator and the detector.
On the other hand, in the technical fields of electronic apparatus, there has been a significant advance in the wide band system of video apparatus and enhancement of speed in computers and information transmission networks. Accordingly, there has been also required a further improved high-speed processing of digital signals in these technological fields.
A conventional phase locked loop (PLL) circuit, which plays an important role in the above-mentioned high-speed signal processing, has the construction shown in FIG. 1. Namely, the output pulse of a voltage-controlled oscillator (VO) is supplied to a the phase comparator (PC), wherein the frequency and phase of the output pulse is compared with those of an input pulse (IP), then a phase difference detected as a comparison output is supplied to a the loop filter (LF) in order to derive a phase error voltage to be fed back to the voltage-controlled oscillator (VO) to control the oscillation frequency, thereby obtaining an output pulse (OP) whose phase is locked to that of the input pulse (IP). With the above PLL circuit, there can be attained, if necessary, an output pulse (OP) having a frequency equal to the value obtained by multiplying the frequency of the input pulse (IP) by an integer M or dividing the frequency by M.
In particular, when a so-called ring oscillator 1 as shown in FIG. 2, wherein an output pulse of a multi-staged phase inversion circuit is fed back to the input side of the circuit, and a propagation delay time in respective devices can be controlled by an applied voltage, is used therein as the voltage-controlled oscillator VO, there can be obtained a timing signal having a time interval shorter than the oscillation output period T by deriving an output pulse from each inverter U at respective stages. For example, in the ring oscillator 1 having five stages of inverters U.sub.1 -U.sub.5 connected in series as shown in FIG. 2, there are generated oscillation pulses FIGS. 2A, 2B, 2C, 2D and 2E each of which repeats bistable phase inversion with a period T. The phase inversion output A-E of respective inverters U.sub.1 -U.sub.5 delay from the immediately preceding one with the same time intervals as shown in the figure. For instance, the adjoining leading edges in the phase inversion outputs A and C have a time interval therebetween that is equal to one-fifth of the oscillation period T.
In order to oscillate the ring oscillator 1, it is necessary to fulfill such oscillation condition that the output 2 of the last stage should have an inverted level of the first stage input 3 during a preceding cycle. Accordingly, the number of inverters connected in series should be an odd number in order to oscillate the ring oscillator 1. As a result, there is only obtained a timing signal having a period equal to one odd-numberth of the oscillation period. On the other hand, in many controlling circuits or measuring circuits, there is required timing pulses having a time interval with a period equal to one even-numberth of the oscillation period. In particular, there has been a great demand for timing signals having a period equal to 1/2.sup.n of an oscillation period in the field of digital signal processing. As described above, however, conventional voltage-controlled oscillating circuits have not been able to meet these requirements since they have to include odd-numbered inverters connected in series.
Meanwhile, an output signal detected by a detector for a high energy beam particle such as a wire chamber needs to be measured with a precision of not more than 1 ns. If it is intended to conduct such a precision measurement through a direct method, it is necessary to utilize a clock signal having a high frequency of 1 GHz or more. This is difficult to realize in practice; and even if possible, the cost would amount to a significantly large sum.
In this connection, it may be possible to directly produce a clock signal having a frequency of around 100 MHz in a CMOS integrated circuit, if a phase locked loop (PLL) circuit is introduced into the CMOS integrated circuit. However, it is still difficult to obtain a clock signal having a frequency of 1 GHz by a direct means. Even if such a clock signal is obtained, it is not practical since it increases the power consumption of the CMOS integrated circuit.
Although it is difficult to directly produce clock signals having a frequency of 1 GHz, it is enough for many applications just to obtain clock pulses having a time interval of 1 ns. Such a clock pulse can be obtained by utilizing a ring oscillator in which a number of clock signal-producing circuits with a much lower frequency are operated successively at time intervals of 1 ns. Accordingly, consideration has been given to successively deriving clock pulses from respective stages of the ring oscillator. As mentioned above, however, it is still difficult to produce timing signals having a period equal to one even-numberth of the clock period. Meanwhile, signal processing in a digital circuit may preferably be conducted at a timing of 1/2.sup.n of the period. Accordingly, when the signal processing is conducted at a timing other than 1/2.sup.n of the period, namely at a timing of one odd-numberth of the period which is easily derived from a circuit utilizing a conventional ring oscillator, the data obtained as processing results should be corrected by using an appropriate coefficient as a multiplier. As a result, the precision of signal processing is greatly deteriorated and the signal processing has to have a complicated system.